The present invention disclosed herein relates to an analog-to-digital converter (ADC), and more particularly, to a successive approximation register ADC and method of operating a built-in self-test (BIST) device for testing the converter.
An analog-to-digital converter (ADC) receives an analog input voltage and converts the voltage into a digital signal. The digital signal may be transmitted to other devices. A successive approximation register (SAR) ADC has a structure in which a comparator is repetitively used. Since the SAR ADC does not have an analog circuit such as a multiplying digital ADC and a sample and hold S/H circuit, it has a simple structure. Thus, it occupies a narrower area and consumes less power, as compared to other ADCs. Also, the SAR ADC is easily applied to a low-voltage circuit.
The SAR ADC may receive output signals from sensors and convert them into digital signals. General sensors have a single-voltage output. Thus, the SAR ADC that converts the signals output from the sensors into digital signals needs to have a single-ended input structure. The SAR ADC includes an SAR logic, a comparator, and a digital-to-analog converter (DAC).
A differential pre-amplifier and a latch may be used as a comparator for comparing the output of the DAC. In this case, the SAR ADC performs a conversion operation by comparing level voltages that are generated based on a digital bit and analog input voltage sampled on a capacitor.
When an output range of a sensor having a single voltage as an output is within a range of a supply voltage Vdd, the voltage of a node connected to the top plate of a capacitor may be higher than the supply voltage Vdd. In this case, due to the malfunction of switches connected to the node having a voltage higher than the supply voltage Vdd, charges stored in the capacitor may be lost and the reliability of the SAR ADC may decrease.